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        <rdf:li rdf:resource="https://rd.uffs.edu.br/handle/prefix/8998" />
        <rdf:li rdf:resource="https://rd.uffs.edu.br/handle/prefix/8113" />
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    <dc:date>2025-12-18T02:50:26Z</dc:date>
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  <item rdf:about="https://rd.uffs.edu.br/handle/prefix/8998">
    <title>Digital circuit partition sizing for gate-level simulations on heterogeneous platforms</title>
    <link>https://rd.uffs.edu.br/handle/prefix/8998</link>
    <description>Title: Digital circuit partition sizing for gate-level simulations on heterogeneous platforms
Author: Thomas, Alexsandro Guilherme
First advisor: Wuerges, Emílio
Abstract: The scale of integration in digital circuits has been increasing exponentially, according to Moore’s Law. Traditional design and development techniques require constant improvement to keep up with the growth of circuits, giving rise to the EDA industry. In large projects, 70% of the electronic circuit development effort is spent on correctness verification. One such correctness verification technique is simulation, which is capable of finding errors in the design, but it relies on computational effort. To speed up the total execution time, gate-level digital circuits can be simulated in parallel, achieving speedups of up to 14.4x when simulated on heterogeneous platforms. On these heterogeneous platforms, the execution of the simulation requires large circuits to be partitioned to fit the computational resources of the machine running the simulation. We showed that when partitioned using non-optimal size parameters, the simulation of the circuit can have on average 802% higher execution times, since the execution patterns are divided into two clusters with short and long execution times. Given a heterogeneous simulation platform and a combinational digital circuit at the logic gate level, the best partitioning technique would maximize the number of inputs, outputs, and ports in each
Publisher: Universidade Federal da Fronteira Sul
Type: Monografia</description>
    <dc:date>2021-01-01T00:00:00Z</dc:date>
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  <item rdf:about="https://rd.uffs.edu.br/handle/prefix/8113">
    <title>Análise de ativos financeiros via grafos de mercado: um estudo no contexto da região sul do Brasil</title>
    <link>https://rd.uffs.edu.br/handle/prefix/8113</link>
    <description>Title: Análise de ativos financeiros via grafos de mercado: um estudo no contexto da região sul do Brasil
Author: Boschetti, Felipe
First advisor: Braga, Andrei de Almeida Sampaio
Abstract: The study of the financial market via graphs has been useful in revealing important information about financial assets. Different studies have performed analyses on indices and sets of assets representative of large markets. However, the absence of studies focusing on a specific region reveals the need of investigations that provide a more accurate view of the regional market and that make it possible to investigate whether general results are valid for less comprehensive contexts. The purpose of this article is to evaluate whether properties detected in general studies are applicable to shares of companies in the southern region of Brazil. Additionally, it is intended to offer valuation metrics for investors and decision-makers. Data from years 2020 to 2022 are analyzed using centrality measurements and cliques of market graphs. The results indicate a significant importance of assets from automotive and transport sectors and a lower influence of assets from textile sector.
Publisher: Universidade Federal da Fronteira Sul
Type: Artigo Cientifico</description>
    <dc:date>2024-01-01T00:00:00Z</dc:date>
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    <title>Uma revisão sistemática sobre Modelos de Linguagem Ampla (LLM’s) aplicados a geração de código</title>
    <link>https://rd.uffs.edu.br/handle/prefix/8112</link>
    <description>Title: Uma revisão sistemática sobre Modelos de Linguagem Ampla (LLM’s) aplicados a geração de código
Author: Bacin, Fabio Alecsandro
First advisor: Feitosa, Samuel da Silva
Abstract: Large Language Models (LLMs) for code generation represent a significant advancement in programming, boosting efficiency and speed in software development, simplifying repetitive processes, facilitating automated testing, and promoting the adoption of best practices. This work aims to map studies related to LLMs for code generation, using systematic literature review as the research method. The analysis of these studies deepens the understanding of the potential of these innovations. By highlighting the benefits and challenges associated with the use of LLMs, this study contributes to expanding knowledge and continuous advancement in this constantly evolving field. The systematic review protocol involved searching for articles in the Google Scholar database, using keywords related to LLMs and code generation. A total of 112 articles were initially found, of which 15 were selected based on relevance and quality criteria. Of the 15 selected articles, 8 were used for detailed comparative analysis, providing a solid foundation for evaluating different approaches and results. The remaining 7 articles served as an introductory theoretical framework, offering a comprehensive and well-founded overview of the essential theories and concepts that support the field of study.
Publisher: Universidade Federal da Fronteira Sul
Type: Artigo Cientifico</description>
    <dc:date>2024-01-01T00:00:00Z</dc:date>
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  <item rdf:about="https://rd.uffs.edu.br/handle/prefix/8110">
    <title>Estudo do impacto de representações distribuídas geradas por large language models na identificação de expressões idiomáticas</title>
    <link>https://rd.uffs.edu.br/handle/prefix/8110</link>
    <description>Title: Estudo do impacto de representações distribuídas geradas por large language models na identificação de expressões idiomáticas
Author: Werle, Paulo Eduardo Rodrigues
First advisor: Salton, Giancarlo Dondoni
Publisher: Universidade Federal da Fronteira Sul
Type: Artigo Cientifico</description>
    <dc:date>2024-01-01T00:00:00Z</dc:date>
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